1. Field of the Invention
The present invention relates to a method of designing a semiconductor device, and to a method of manufacturing a semiconductor device, and in particular, relates to methods for reducing the manufacturing cost of the semiconductor device.
2. Description of the Related Art
In conventional methods of designing and manufacturing a semiconductor device, reduction of the manufacturing cost of the semiconductor device has been an important objective.
In a conventional method for achieving this objective, a semiconductor device having a semiconductor chip which is as small as possible is designed under specific conditions defined by the relevant manufacturing process, such as the overall structure, and the pitch, width, and spacing of wiring (lines) of the semiconductor device, and then an appropriate mask is manufactured; a semiconductor device is then manufactured using the mask. This method has been put into practice.
However, in the above-described method, a process of producing a semiconductor chip and a process of forming wiring are integrated in a single process. Therefore, if a process of producing a semiconductor chip having a fine structure is used, then a process of forming fine, wiring is simultaneously employed.
If the density of wiring lines with respect to the semiconductor chip size is low, the layout of the semiconductor chip can be modified even when the modification of the pitch and width of wiring is considerable. However, even in such a case, a mask and a semiconductor device based on design rules employing small pitch and width of wiring are employed in the above conventional method.
The manufacturing cost necessary for using a mask and a semiconductor device which have small pitch and width of wiring is higher than that necessary for using a mask and a semiconductor device which have large pitch and width of wiring. Therefore, the above conventional method is not satisfactory in consideration of reduction of the manufacturing cost of the semiconductor device.
In consideration of the above circumstances, an object of the present invention is to provide a method of designing a semiconductor device and a method of manufacturing a semiconductor device, in order to reduce the manufacturing cost of the semiconductor device. Another object of the present invention is to provide a method of designing a semiconductor device and a method of manufacturing a semiconductor device, in order to easily realize a high-speed circuit by reducing wiring capacity (or capacitance).
Therefore, the present invention provides a method of designing a semiconductor device which includes at least semiconductor chips and wiring layers for connecting the semiconductor chips, comprising the step of:
determining a maximum pitch of wiring of the wiring layers under a condition that power consumption of the semiconductor chips at a predetermined operating frequency is equal to or less than a predetermined value.
The above method may further comprise the step of determining the width and spacing of wiring of the wiring layers and the width of each contact for mounting the semiconductor chips, based on the determined pitch of wiring of the wiring layers.
In addition, the above method may further comprise the step of selecting one or more of the wiring layers under a predetermined condition. In this case, in the step of determining a maximum pitch of wiring of the wiring layers, the pitch of wiring of only the selected wiring layers is maximized under the condition that power consumption of the semiconductor chips at a predetermined operating frequency is equal to or less than a predetermined value.
The present invention also provides a method of manufacturing a semiconductor device which includes at least semiconductor chips and wiring layers for connecting the semiconductor chips, comprising the steps of:
determining a maximum pitch of wiring of the wiring layers under a condition that power consumption of the semiconductor chips at a predetermined operating frequency is equal to or less than a predetermined value;
determining the width and spacing of wiring of the wiring layers and the width of each contact for mounting the semiconductor chips, based on the determined pitch of wiring of the wiring layers; and
manufacturing the semiconductor device by using a mask and a manufacturing process by which the determined pitch and width of wiring are realized.
This method of manufacturing a semiconductor device may further comprise the step of selecting one or more of the wiring layers under a predetermined condition. In this case, in the step of determining a maximum pitch of wiring of the wiring layers, the pitch of wiring of only the selected wiring layers is maximized under the condition that power consumption of the semiconductor chips at a predetermined operating frequency is equal to or less than a predetermined value.
In addition, the method of manufacturing a semiconductor device may further comprise the step of selecting a mask and a manufacturing process under a predetermined condition among masks and manufacturing processes for realizing the determined pitch and width of wiring. In this case, in the step of manufacturing the semiconductor device, the semiconductor device is manufactured by using the selected mask and manufacturing process.
According to the present invention, a maximum pitch of wiring of the wiring layers is determined under the condition that power consumption of the semiconductor chips at a predetermined operating frequency is equal to or less than a predetermined value. Therefore, a semiconductor device is manufactured, not by using an unnecessarily fine mask and manufacturing process, but by using a mask and manufacturing process which is determined based on relaxed design rules and has a lower manufacturing cost, thereby reducing the manufacturing cost of the semiconductor device.
In addition, by enlarging the pitch of wiring, the capacity between wiring lines can be reduced, thereby increasing the circuit speed and reducing crosstalk noise.